CryptoLite-ICE
FPGA-based True Random Number Generator. Ring oscillators on a Lattice iCE40UP5K harvest physical entropy; an RP2040 hashes the output via SHA-256 and exposes numbers over USB CLI and UART API.
lut7@dev:~$ ./lut7 --init
projects
FPGA-based True Random Number Generator. Ring oscillators on a Lattice iCE40UP5K harvest physical entropy; an RP2040 hashes the output via SHA-256 and exposes numbers over USB CLI and UART API.
Networked True Random Number Generator on an Avnet Ultra96 (Zynq UltraScale+ ZU3CG). Ring oscillators build a 440-bit raw word, an RTL SHA-256 core conditions it to 256 bits, and the PS POSTs the value, the raw stream and the NIST SP 800-90B health results to this site.
about
LUT7 is an independent research handle at the intersection of FPGA engineering and cybersecurity.
An FPGA developer with a passion for cryptography and covert communications — building things at the hardware level that most people only think about in software.
Areas of focus: hardware cryptographic primitives, steganographic covert channels, and low-level work sitting at the boundary between silicon and secrets.
Projects range from custom cryptographic accelerators to FPGA-based signal processing for imperceptible data hiding. All research is published when ready.